Within a multidisciplinary technological research team of experts in SW/HW co-design tools by applying formal methods, you will be involved in a national research project aiming at developing an environment to identify, analyze and reduce the interferences generated by the concurrent execution of applications on a heterogeneous commercial-off-the-shelf (COTS) multi-core hardware platform.

Your main missions will be :

1. To propose and develop a formal modeling strategy for the temporal behavior of the hardware platform's microarchitecture and memory hierarchy based on microbenchmarking results of the platform. The microbenchmarking results are produced by a project partner. This modeling will be used to identify interferences and the impact of temporal anomalies on memory accesses, especially their temporal predictability.
2. To propose and develop an approach to make the execution of applications more predictable by reducing the interferences identified in point 1. via the definition of specific rules at the level of their execution model but also at the level of their programming model to guide code synthesis. The whole will be enhanced by the integration of such an approach within a compilation environment chosen by the project partners.

You are also expected to :

Communicate about the work to the project partners, but also work directly with the French and German partners of the project;
Participate in the scientific dissemination of the team's research results (contributions to publications in international conferences) and in the development of our innovations (writing of patents).
To carry out your mission, you will benefit from a first class environment at CEA LIST with access to a large number of reference tools and a strong experience in the application of formal methods to the verification of properties such as temporal anomalies.

You have a PhD in the field of electronics or embedded systems. You have significant experience in architecture and/or compilation as well as in the use of formal methods. You also have a first experience in the design and verification/validation of real-time applications on multicore architectures. You enjoy working in an applied research environment at the state of the art and proposing innovations and various application areas.

You have acquired the following technical skills

• Computer architecture and programming: knowledge of multi/many-core architectures and their use in a context for the execution of real-time applications, worst-case execution time analysis, formalization of architecture instruction sets (such as SAIL), knowledge of hardware architecture description languages (HDL)
•  Formal methods: formal specification language, model-checking environment, SMT solvers, etc.
• Compilation: knowledge of design environments for real-time systems (e.g. synchronous programming), compilation chains (LLVM / GCC)
• Experience in terms of interaction with partners in collaborative and/or industrial projects as well as in terms of scientific publications is also expected.

Desired personal qualities :

• Ability to work in a team, while showing a good autonomy in daily life;
• Scientific curiosity, taste for technical challenges;
• Ability to understand and solve complex problems;
• Ability to take a step back and have a transverse vision;
• Rigorous work methods and a spirit of synthesis.