General information
Organisation
The French Alternative Energies and Atomic Energy Commission (CEA) is a key player in research, development and innovation in four main areas :
• defence and security,
• nuclear energy (fission and fusion),
• technological research for industry,
• fundamental research in the physical sciences and life sciences.
Drawing on its widely acknowledged expertise, and thanks to its 16000 technicians, engineers, researchers and staff, the CEA actively participates in collaborative projects with a large number of academic and industrial partners.
The CEA is established in ten centers spread throughout France
Reference
2024-33377
Description de l'unité
Located in Grenoble, the DSYS Department of LETI conducts research and development (R&D) aimed at designing and creating innovative solutions for industry in the broadest sense (SMEs, mid-sized businesses, large corporations) and for a wide range of application sectors (transport, security, consumer goods, housing, industry, healthcare, etc.). It is built on a foundation of expertise covering:
- Communications in the broadest sense (wireless or wired; short and long range; using radio waves, light, inductive coupling, etc.),
- Sensors and miniature sensor systems,
- Energy management, harvesting, and conversion for microsystems, as well as for macroscale systems through the joint Leti–Liten laboratory,
- Securing electronic components and systems and assessing their vulnerability to attacks.
Position description
Category
Electronics components and equipments
Contract
Internship
Job title
Hardware Authentication: Detection of Hardware Trojans in an FPGA (M/F)
Subject
**Hardware Authentication: Detecting Hardware Trojans in an FPGA M/F**
**Internship Topic**
The lifecycle of an FPGA is not always fully understood by the end user, and it is sometimes crucial to ensure that the circuit defined in the FPGA matches the one that was implemented, and that no modifications or additions have been introduced by a malicious entity.
During this internship, we will evaluate circuit signatures based on their clock tree, which depends on the arrangement of registers and thus the functionality of the circuit. Methods for extracting easily digitised impulse responses can be explored through fault injection solutions on FPGAs, such as TRAITOR [1].
The intern's tasks will include:
- Familiarising with a Xilinx FPGA board
- Extracting impulse responses from clock trees on different test circuits
- Evaluating the reproducibility of these signatures
- Addressing potential variations
- Testing the solution on real circuits with or without modifications
Contract duration (months)
5 to 6 months
Job description
**Join us for an internship!**
As an intern at CEA-LETI (the technological research institute of CEA Tech), you will have the opportunity to work in a world-renowned research environment. Our teams are made up of passionate and dedicated experts, providing an ideal setting for learning and collaboration. You will have access to cutting-edge equipment and top-tier research resources to carry out your missions.
**WHY JOIN US?**
To contribute to the industrial transfer of innovations for applications in fields such as industry, aeronautics, bio-production, sports, or even agriculture and resource conservation by designing electronic boards and programming for embedded systems.
**Your missions:**
The lifecycle of an FPGA is not always well understood by the end user, and it is sometimes important to ensure that the circuit defined in the FPGA matches what was implemented, and that no modifications or additions have been introduced by a malicious entity. This is especially true for the numerous implementations of open-source RISC-V processors available on platforms such as Github.
During this internship, we will evaluate circuit signatures based on their clock tree, which depends on the arrangement of registers and thus the circuit's functionality. Methods for extracting easily digitised impulse responses can be explored through fault injection solutions on FPGAs such as TRAITOR [1].
The intern's tasks will include:
- Getting hands-on with a Xilinx FPGA board
- Extracting impulse responses from clock trees on different test circuits
- Evaluating the reproducibility of these signatures
- Addressing potential variations
- Testing the solution on real circuits with or without modifications
The candidate should have knowledge in digital design (particularly on FPGA) and signal processing.
[1] TRAITOR: A Low-Cost Evaluation Platform for Multifault Injection. Ludovic Claudepierre, Pierre-Yves Péneau, Damien Hardy, Erven Rohou.
Methods / Means
knowledge of design FPGA flow (vivado), C/C++, python
Applicant Profile
WHAT DO WE EXPECT FROM YOU?
Solid knowledge in:
Digital design on FPGA
Signal processing
Processor architecture
Programming (C/C++ and Python)
Experience in:
Digital design on FPGA
Open-mindedness and good autonomy
Interest in working on projects
Why join LETI – DSYS?
A position in the heart of the Grenoble metropolitan area, easily accessible through sustainable mobility supported by the CEA,
A unique research environment dedicated to topics with major societal impact, such as resource conservation (functional economy, water consumption monitoring and optimisation, etc.) or energy efficiency (predictive maintenance, process optimisation),
Experience in a cutting-edge field of innovation with strong industrial development potential, for example in aeronautics or bio-production,
Training to strengthen your skills or acquire new ones in embedded electronics, mechatronics, or multiphysics and multi-scale system simulation,
A balanced work-life internship experience.
Position location
Site
Grenoble
Job location
France, Auvergne-Rhône-Alpes, Isère (38)
Location
Grenoble
Candidate criteria
Languages
English (Beginner)
Prepared diploma
Bac+5 - Diplôme École d'ingénieurs
Recommended training
digital design
PhD opportunity
Non
Requester
Position start date
01/02/2025
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